PCBs are used in a variety of electrical, electronic and optoelectronic applications for mounting and electrically interconnecting electrical, electronic and/or optoelectronic components. A typical PCB comprises layers of organic dielectric substrate material, typically referred to as prepreg, having layers of metal embedded therein that are often patterned to provide electrical signal routing. The metal layers are often interconnected by electrically-conductive vias to allow the electrical signals to be routed vertically through multiple layers of the PCB.
A typical PCB manufacturing process is a build-up process in which the layers are built one layer at a time. The build-up process typically comprises using dry dielectric film masking steps to selectively mask regions of a metal seed layer disposed on a starting structure, electroplating onto the unmasked regions of the metal seed layer to form a patterned metal layer, removing the dry dielectric film layer and the metal seed layer below it, laminating a layer of dielectric prepreg material on top of the patterned metal layer, drilling one or more via holes through the laminated dielectric prepreg, cleaning the via holes, forming a metal seed layer on the walls of the via holes, and electroplating metal onto the via holes and onto the non-masked areas of the seed layer to simultaneously fill the via holes with metal and form the patterned metal layer. The process is then repeated to form each additional PCB layer.
On one or both of the outer PCB layers, electrical contact pads are formed by electroplating a layer of metal, typically copper, onto the metal seed layer. After the layer of copper has been plated onto the metal seed layer, a finishing layer of metal, which is often a layer of gold (Au) or Nickel-Gold (NiAu), is plated onto the top surfaces of the copper electrical contact pads. The exposed portions of the metal seed layer are then etched away. A solder mask dielectric material layer, typically a photoimageable polymer material, is then applied (e.g., by spin coating) on top of and in between the electrical contact pads. A second dielectric material layer is then formed on top of the solder mask dielectric material layer and patterned to expose only the portions of the solder mask dielectric material layer that are in between the electrical contact pads. The second dielectric material layer and the exposed portions of the solder mask dielectric material layer are then subjected to radiation. The second dielectric material layer and the unexposed portions of the solder mask dielectric material layer that are on top of the electrical contact pads are then removed such that only the electrical contact pads and the solder mask dielectric material in between the electrical contact pads remain on the PCB surface. The remaining dielectric material constitutes the solder mask.
FIG. 1A illustrates a side cross-sectional view of a PCB 2 having an array of electrical contact pads 3 and a conventional, photolithographically-formed solder mask 4 disposed on the bottom surface thereof. FIG. 1B illustrates an enlarged cross-sectional view of the portion of the PCB 2 shown in the dashed circle 9 in FIG. 1A. The array of electrical contact pads 3 may be, for example, a land grid array (LGA). When the solder mask is applied on top of and in between the electrical contact pads, it is applied with a thickness that is at least slightly greater than the height of the electrical contact pads. Typically, portions 4a of the solder mask 4 overlap the electrical contact pads 3, whch can lead to problems when testing the PCB 2 or later during operations due to poor electrical connections between the electrical contact pads 3 and external electrical contacts, e.g., electrical contact pads of a system PCB (not shown) on which the PCB 2 is mounted. If the thickness of the solder mask 4 is much greater than the height of the electrical contact pads 3, the solder mask 4 becomes very heavy and can cause the PCB 2 to bow, or drawbridge, which can lead to other problems, such as delamination and poor electrical connections, for example.
FIG. 2A illustrates a side cross-sectional view of a PCB 5 having an array of electrical contact pads 6 and a conventional, photolithographically-formed solder mask 7 disposed on the bottom surface thereof. FIG. 2B illustrates an enlarged cross-sectional view of the portion of the PCB 5 shown in the dashed circle 11 in FIG. 2A. In this case, gaps 8 exist between the side walls of the electrical contact pads 6 and the solder mask 7. The gaps 8 can be caused by inaccuracies during the steps of exposing and developing particular areas of the dielectric material layer that covers the solder mask and/or during the steps of exposing and developing the dielectric material of the solder mask. These gaps 8 can result in electrical shorts and they can make any underlying electrical traces vulnerable to oxidation.
Accordingly, a need exists for a method of forming a solder mask that allows the solder mask to have a very precise, preselected thickness and that ensures that there are no gaps between the solder mask and the side walls of the electrical contact pads. A need also exists for a PCB assembly that incorporates the solder mask.